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TODO List: Difference between revisions
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* Make it compile with no warnings. Make sure to use warning flags when compiling! * Do not fix warnings in code that you don't understand! * It's not worth the risk of breaking things. | * Make it compile with no warnings. Make sure to use warning flags when compiling! * Do not fix warnings in code that you don't understand! * It's not worth the risk of breaking things. | ||
* Fix the [http://code.google.com/p/dolphin-emu/issues/list?q=label:Easy easy issues] or any of the other issues on our tracker. | * Fix the [http://code.google.com/p/dolphin-emu/issues/list?q=label:Easy easy issues] or any of the other issues on our tracker. | ||
= JIT Optimization Ideas = | |||
delroth's JIT optimization ideas | |||
== Better handling of MMIO reads/writes == | |||
Currently MMIO reads/writes go through Memory::{Read_Write}_U{8,16,32} even if we know the destination address. It should be possible to dispatch directly to the hardware module write function and avoid a call+dispatch at run time, but it requires a lot of refactoring in the HW MMIO interfaces to do nicely. | |||
Ideally, HW modules should be able to provide ASM routines for some of their memory reads/writes and make things even faster for basic cases of "just read a global variable". | |||
== Busy wait loop detection == | |||
If we could detect loops that exit only depending on some memory value, and this memory value is not written to in the body of the loop, we should know that it will never leave the loop unless an interrupt is raised. We can then stop scheduling the Jit until we get an interrupt. | |||
== Macroblocks == | |||
Our Jit compiles PPC code block per block, with each block defined as a list of sequential instructions up to the next conditional or indirect jump. Including conditional jumps here would be extremely useful because larger blocks == less time spent spilling registers. However, having conditional jumps means having forks and joins, which aren't handled by our regcache at all. It also means some slight JitCache modifications. | |||
Overall, that should give a nice performance boost but will also be fairly difficult: needs a new regcache, needs to think of a way to handle interrupt checking/downcount (we might need to leave in the middle of a macroblock and come back later - so the regcache might need to generate "resume trampolines"). | |||
== Finally implementing floats/paired singles properly == | |||
If someone could get a good test coverage with an homebrew program and work on a mostly JITed floats/paired singles implem, it would reduce CPU usage by at least 5% in most games. | |||
[[Category:Development]] | [[Category:Development]] | ||