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TODO List: Difference between revisions
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== Add curl support == | == Add curl support == | ||
* Proposed by: Parlane | * Proposed by: Parlane | ||
* Difficulty: average | * Difficulty: average | ||
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== "Check for updates" feature == | == "Check for updates" feature == | ||
* Proposed by: Parlane | * Proposed by: Parlane | ||
* Difficulty: easy | * Difficulty: easy | ||
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== Hardware errors detection == | == Hardware errors detection == | ||
* Proposed by: delroth | * Proposed by: delroth | ||
* Difficulty: average | * Difficulty: average | ||
| Line 26: | Line 23: | ||
== Generate crash informations on JIT segfault == | == Generate crash informations on JIT segfault == | ||
* Proposed by: delroth | * Proposed by: delroth | ||
* Difficulty: easy/average | * Difficulty: easy/average | ||
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== Implement Post-Processing shaders in D3D11 == | == Implement Post-Processing shaders in D3D11 == | ||
* Proposed by: Sonicadvance1 | * Proposed by: Sonicadvance1 | ||
* Difficulty: average | * Difficulty: average | ||
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== Implement more fastmem methods == | == Implement more fastmem methods == | ||
* Proposed by: Sonicadvance1 | * Proposed by: Sonicadvance1 | ||
* Difficulty: average/hard | * Difficulty: average/hard | ||
| Line 49: | Line 43: | ||
== Fix CPUCompare == | == Fix CPUCompare == | ||
* Proposed by: Sonicadvance1 | * Proposed by: Sonicadvance1 | ||
* Difficulty: average/hard | * Difficulty: average/hard | ||
| Line 56: | Line 49: | ||
== Qt GUI == | == Qt GUI == | ||
* Proposed by: neobrain | * Proposed by: neobrain | ||
* Difficulty: easy/average | * Difficulty: easy/average | ||
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== Better handling of MMIO reads/writes == | == Better handling of MMIO reads/writes == | ||
Currently MMIO reads/writes go through Memory::{Read_Write}_U{8,16,32} even if we know the destination address. It should be possible to dispatch directly to the hardware module write function and avoid a call+dispatch at run time, but it requires a lot of refactoring in the HW MMIO interfaces to do nicely. | Currently MMIO reads/writes go through Memory::{Read_Write}_U{8,16,32} even if we know the destination address. It should be possible to dispatch directly to the hardware module write function and avoid a call+dispatch at run time, but it requires a lot of refactoring in the HW MMIO interfaces to do nicely. | ||
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== Busy wait loop detection == | == Busy wait loop detection == | ||
If we could detect loops that exit only depending on some memory value, and this memory value is not written to in the body of the loop, we should know that it will never leave the loop unless an interrupt is raised. We can then stop scheduling the Jit until we get an interrupt. | If we could detect loops that exit only depending on some memory value, and this memory value is not written to in the body of the loop, we should know that it will never leave the loop unless an interrupt is raised. We can then stop scheduling the Jit until we get an interrupt. | ||
== Macroblocks == | == Macroblocks == | ||
Our Jit compiles PPC code block per block, with each block defined as a list of sequential instructions up to the next conditional or indirect jump. Including conditional jumps here would be extremely useful because larger blocks == less time spent spilling registers. However, having conditional jumps means having forks and joins, which aren't handled by our regcache at all. It also means some slight JitCache modifications. | Our Jit compiles PPC code block per block, with each block defined as a list of sequential instructions up to the next conditional or indirect jump. Including conditional jumps here would be extremely useful because larger blocks == less time spent spilling registers. However, having conditional jumps means having forks and joins, which aren't handled by our regcache at all. It also means some slight JitCache modifications. | ||
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== Finally implementing floats/paired singles properly == | == Finally implementing floats/paired singles properly == | ||
If someone could get a good test coverage with an homebrew program and work on a mostly JITed floats/paired singles implem, it would reduce CPU usage by at least 5% in most games. | If someone could get a good test coverage with an homebrew program and work on a mostly JITed floats/paired singles implem, it would reduce CPU usage by at least 5% in most games. | ||
== Separate single and double floats in the register cache == | == Separate single and double floats in the register cache == | ||
Because of the crazy paired singles design (one double and one single register), we do lots of expensive (checkout ppc_fp branch), redundant format convertions. Almost all of them could be avoided by converting on use, but the register cache would need a bit of redesign. | Because of the crazy paired singles design (one double and one single register), we do lots of expensive (checkout ppc_fp branch), redundant format convertions. Almost all of them could be avoided by converting on use, but the register cache would need a bit of redesign. | ||
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== Write new Guides == | == Write new Guides == | ||
* Postprocessing shaders (and remove Data/Sys/Shaders/README.txt from the source repository once that's written) | * Postprocessing shaders (and remove Data/Sys/Shaders/README.txt from the source repository once that's written) | ||
* BBA guide | * BBA guide | ||